For the best transient response in applications with
large step loads (see the Input and Output Capacitor
Selection section for output capacitance requirements),
use the following equations to select the compensation
components:
where C
OUT
is the output capacitance and R
ESR
is the
ESR of C
OUT
.
To use a low-cost ceramic capacitor (see the Input and
Output Capacitor Selection section for load-transient
response characteristics), use the following equations
to select the compensation components:
Example
OUTPUT 1 of Figure 1 is used in this example. Table 1
shows the values required to calculate the compensa-
tion. The values were taken from the appropriate data
sheets and Figure 1.
PC Board Layout Guidelines
Due to the high-current paths and tight output accuracy
required by most applications, careful PC board layout is
required. An evaluation kit (MAX8563EVKIT) is available
to speed design.
It is important to keep all traces as short as possible to
maximize the high-current trace dimensions to reduce the
effect of undesirable parasitic inductance. The MOSFET
dissipates a fair amount of heat due to the high currents
involved, especially during large input-to-output voltage
differences. To dissipate the heat generated by the
MOSFET, make power traces very wide with a large
amount of copper area. An efficient way to achieve good
power dissipation on a surface-mount package is to lay
out copper areas directly under the MOSFET package on
multiple layers and connect the areas through vias. Use a
ground plane to minimize impedance and inductance. In
addition to the usual high-power considerations, here are
four tips to ensure high output accuracy:
" Ensure that the feedback connection to C
OUT_
is
short and direct.
" Place the feedback resistors next to the FB pin.
" Place R
C
and C
C
next to the DRV_ pin.
" Ensure FB_ and DRV_ traces are away from noisy
sources to ensure tight accuracy.
g
S x
A
A
S
C
x
V x
F x
S x
S x
m
S x
V
A
pF
F use F
C MAX
C
(
)
.
.
.
.
.
.
.
. . .
.
,
.
=
=
=
+
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
+
(
)
=
30
1 5
8 8
12 4
0 16
1 5
100
12 4
12 4
18
1
12 4
1 5
1 5
2500
0 90
1
2
?/DIV>
?/DIV>
?/DIV>
?/DIV>
RR
x
V x
F x
S x
m
F
S x
V
A
use
C
.
.
. . .
. ,
.
=
+
(
)
+
(
)
=
59
1 5
100
12 4
18
1
1 12 4
1 5
1 5
599 4
620
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
C
C
x g
g
x V
I
C
R
x
C
C x g
C
OUT
C MAX
C MAX
OUT
OUT MAX
ISS
C
OUT
MAX
(
)
(
)
_
=
+
(
)
=
15
C
V
C
g
g
R
g
V
I
C
R
V
x C
g
x R
C x g
V
I
C
OUT
OUT
C MAX
C MAX
ESR
C MAX
OUT OUT MAX
ISS
C
OUT
OUT C MAX
ESR
C
C MAX
OUT
OUT
.
(
)
(
)
(
)
_
(
)
(
)
_
=
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
+
(
)
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
+
(
)
=
?/DIV>
+
(
)
?/DIV>
+
0 16
1
59
1
2
MAX
MAX
(
)
?%, Ultra-Low Output Voltage, Dual and Triple
Linear n-FET Controllers
12 ______________________________________________________________________________________
Table 1. Parameters Required to
Calculate Compensation
PARAMETER CONDITIONS
VALUE
UNITS
M FET
V
DS
= 1V
2500
pF
M FET F
IDFS = 8.8A
30
S
V
OUT1
Figure 1
1.5
V
I
OUT_MAX
Figure 1
1.5
A
C
OUT1
Figure 1
100
礔
R
ESR
Figure 1
18
m?/DIV>
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MAX8667ETEAA+
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